Thomas Schaub
Partner COO FPGA & Hardware Designer at NetTimeLogic GmbH
Zurich, Zurich, Switzerland
Summary
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Rockstar🎓
Top SchoolThomas Schaub is a Zurich-based FPGA and hardware designer with six years of focused experience building precision time and embedded systems, now serving as Partner and COO of NetTimeLogic GmbH. He combines hands-on FPGA development—demonstrated by his contributions to the Time Card project, where he implemented clock selection, PPS/NMEA integrations and low-level bitstream work—with business leadership in a niche timing technology company. Prior roles at ABB and Hapa AG solidified his expertise across electronic and firmware domains, enabling him to translate complex synchronization requirements into reliable hardware solutions. Known for pragmatic problem-solving, he blends systems-level thinking with meticulous hardware-level implementation, often tackling the less visible but critical tasks like clock switching, reset logic and sensor integration.
6 years of coding experience
14 years of employment as a software developer
Bachelor of Science in Electrical and Infortmation Technology, Communication Technology, Bachelor of Science in Electrical and Infortmation Technology, Communication Technology at Fachhochschule Nordwestschweiz FHNW Windisch
French, English, German
Github Skills (6)
fpga10
i2c10
embedded10
sys10
synchronization9
distributed-systems8
Programming languages (1)
Github contributions (4)
Time-Appliances-Project/Time-Card
Nov 2020 - Jan 2023
Develop an end-to-end hypothetical reference model, network architectures, precision time tools, performance objectives and the methods to distribute, operate, monitor time synchronization within data center and much more...
Role in this project:
Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:11 releases, 94 commits, 108 pushes in 2 years 2 months
Contributions summary:Thomas primarily worked on the FPGA implementation for a time card project. Their contributions involved adding and modifying bitstreams, implementing source clock selection, and integrating I2C communication for various sensors and devices. They also made several changes related to the system reset, clock switching, and the addition of features like a PPS source selector and NMEA/TOD master. The user's work focused heavily on hardware-level interactions and functionality.
monitorsdnload-balancinglinearizabilitymonitoring
NetTimeLogic/open62541
May 2020 - Jul 2021
Open source implementation of OPC UA (OPC Unified Architecture) aka IEC 62541 licensed under Mozilla Public License v2.0
Contributions:8 pushes in 1 year 2 months
siemenslicensediec-62541yanginfiniband
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