Tiancheng Xu
Hardware Architecture Modeling Engineer at Google
Sunnyvale, California, United States
Summary
👤
Senior🎓
Top SchoolTiancheng Xu is a hardware architecture modeling engineer with nine years of experience specializing in performance analysis, low-level accelerator kernels, and hardware acceleration for FPGAs and cloud-scale systems. Currently on the Cloud TPU team at Google, he brings a strong research-to-production trajectory—spanning PhD work and peer-reviewed MICRO publications on algorithm-architecture co-design for 3D point clouds to building a full-system functional simulator for Waymo Compute accelerators. His expertise blends high-level synthesis and computer architecture with hands-on optimization of critical kernels, enabling efficient mapping of algorithms to custom hardware. Based in Sunnyvale, he pairs deep academic rigor with practical engineering impact, often focusing on end-to-end system behavior rather than isolated microbenchmarks.
9 years of coding experience
2 years of employment as a software developer
Doctor of Philosophy - PhD, Computer Science, Doctor of Philosophy - PhD, Computer Science at Rice UniversityMaster of Science - MS, Computer Science, Master of Science - MS, Computer Science at University of RochesterBachelor's degree, Computer Science, Bachelor's degree, Computer Science at Huazhong University of Science and Technology
Github Skills (50)
computer-vision9
pcl9
wsi9
tflearn9
histopathology9
vitis9
point-cloud9
depth9
cpp9
warc8
fpga8
image-preprocessing8
sequencing8
ply8
slide8
Programming languages (6)
Github contributions (5)
tcxxxx/tcxxxx
Jul 2020 - Oct 2022
Contributions:7 commits, 8 pushes, 3 branches in 2 years 3 months
tcxxxx/WSI-analysis
Apr 2018 - Apr 2021
Python scripts for automatic Whole-Slide Image preprocessing.
Contributions:6 commits, 1 PR, 154 pushes in 3 years
wsipythonslidewhole-slide-imagecomputer-vision
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