Tina Chumber
Senior Pre-Silicon Verification Engineer - Emulation
California, United States
Summary
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Senior🎓
Top SchoolTina Chumber is a Senior Pre-Silicon Verification Engineer with eight years of experience and a focused expertise in emulation, SoC and RTL design, and HSIO protocol integration. She has progressed at Intel from emulation intern to senior engineer, combining hands-on debugging and architecture-level problem solving with automation and project management. Proficient in SystemVerilog/Verilog, VHDL and scripting (Python, Perl, TCL), she routinely leverages tools like ZeBu, VCS and Verdi to accelerate verification and performance optimization. Tina’s background bridging hardware-centric roles and earlier public-sector coordination work gives her a rare mix of technical rigor and stakeholder management. Based in California, she’s seeking challenging roles in emulation, pre-silicon verification, and system validation where deep debug experience and cross-domain integration matter.
8 years of coding experience
1 year of employment as a software developer
California State University, SacramentoMaster's degree Computer Science, Master's degree Computer Science at B D Arya College Jalandhar
English, Hindi, PunjabiGithub contributions (5)
raman-chumber/Email-Spoofing-in-Python
Jan 2019 - Oct 2019
Contributions:4 commits, 2 pushes in 9 months
raman-chumber/Timing-Analysis-Projects-using-Verilog-and-Perl
Sep 2019 - Nov 2019
Contributions:17 commits, 1 push in 1 month
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