Tiziano De Matteis

Assistant Professor at Vrije Universiteit Amsterdam (VU Amsterdam)

Netherlands
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Summary

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Tiziano De Matteis is an Assistant Professor at Vrije Universiteit Amsterdam with 11 years of experience researching high-performance computing, parallel programming models, accelerators, and post‑Moore architectures. His academic trajectory includes postdoctoral work at ETH Zurich and Pisa and a PhD focused on high-performance data stream processing, blending low-latency system design with adaptive runtime behavior. He contributes to prominent open-source efforts such as the DaCe data-centric parallel programming framework, where he improved C++ code generation, type inference, and FPGA/OpenCL support—demonstrating practical impact on compiler and accelerator toolchains. Tiziano combines deep research rigor with hands-on systems engineering, routinely bridging algorithmic skeletons and concrete codegen optimizations. Colleagues know him for turning theoretical parallel patterns into performant, production-ready implementations across CPUs, GPUs, FPGAs, and emerging architectures.
code11 years of coding experience
job9 years of employment as a software developer
bookMaster degree, Computer Science and Networking, Master degree, Computer Science and Networking at Università di Pisa
languagesEnglish, Italian
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Github Skills (7)

type-inference10
c-language10
parsing10
cprogramming-language10
parse10
ast-parser10
opencl9

Programming languages (7)

JavaC++CMLIRPythonKotlinCuda

Github contributions (5)

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spcl/dace

Sep 2019 - Dec 2022

DaCe - Data Centric Parallel Programming
Role in this project:
userBack-end Developer
Contributions:160 reviews, 855 commits, 147 PRs in 3 years 3 months
Contributions summary:Tiziano's contributions are centered around enhancing the code generation capabilities of the DaCe framework, particularly focusing on C++ code unparsing and type inference within tasklets. Their work involves refining the C++ code generation process, improving the interpretation of Python code during the AST parsing, and incorporating OpenCL vector data types. Furthermore, they've worked on adding functionalities to the FPGA code generation, with emphasis on optimizations and support for inter-kernel streams.
cudahigh-level-synthesisparallelhigh-performance-computingvivado-hls
Contributions:33 pushes, 1 branch in 5 years 4 months
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