Member Of Technical Staff, Graphics Verification Engineer
Ontario, Canada
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Summary
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Senior
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Top School
Trevor Pogue is a Silicon Design and Verification engineer with nine years of experience and a PhD in AI Hardware, currently contributing to top-level graphics processor IP verification at AMD. He has progressed from intern to Member of Technical Staff, driving SOC- and IP-level DV/PV/emulation methodologies for high-performance Instinct accelerators and graphics cores. Trevor combines RTL/SystemVerilog UVM testbench development, C++ DPI integration, and microarchitectural specification work with hands-on simulation and timing optimization skills. He has a strong academic foundation from McMaster University and practical mixed-signal PHY verification experience from Synopsys, giving him breadth across digital, analog-behavioral, and system protocols like PCIe, CXL, UCIe, and HBM. Known for designing DfV architectures and coordinating cross-team sign-off, he brings both deep technical rigor and a collaborative teaching mindset from years mentoring undergraduates. Outside core engineering, an unexpected thread in his background is a prior leadership role in award-winning craft-brew marketing, reflecting creative communication strengths alongside technical depth.
9 years of coding experience
2 years of employment as a software developer
Doctor of Philosophy (PhD), Electrical and Computer Engineering, 3.93/4, Doctor of Philosophy (PhD), Electrical and Computer Engineering, 3.93/4 at McMaster University
Python package providing flexible tree data structures for organizing lists and dicts into sections.
Contributions:4 releases, 33 commits, 1 PR in 8 months
sectionspythondatastructureslistsdata-structures
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Trevor Pogue - Member Of Technical Staff, Graphics Verification Engineer