Trivendram Pal
Senior CAD Engineer at NVIDIA
Delhi, India
Summary
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Rockstar🎓
Top SchoolTrivendram Pal is a Senior CAD Engineer with seven years of experience building optimization and verification tooling for leading EDA products, most recently contributing to timing signoff and physical-design optimizations at NVIDIA after roles at Siemens EDA and Cadence. He combines low-level proficiency in C/C++, TCL and Verilog with higher-level skills in Python, multithreading, design patterns and machine learning to deliver measurable runtime and TAT improvements in routing and visualization flows. At Siemens he developed a Python-based static analysis flow and helped accelerate waveform visualization for Questa Sim; at Cadence he improved blockage-aware and partition-aware routing for INNOVUS. Known for pragmatic problem-solving, he focuses on algorithmic optimization and practical software engineering in ASIC physical design domains. A B.Tech in Electronics and Communication from NSUT Delhi, he pairs strong academic foundations with hands-on experience across both R&D and production-grade tooling. Outside core EDA work he has applied computer vision and ML techniques earlier in his career, reflecting a wider appetite for cross-disciplinary solutions.
7 years of coding experience
4 years of employment as a software developer
Bachelor of Technology - BTech, Electronics and communication, 8.50, Bachelor of Technology - BTech, Electronics and communication, 8.50 at Netaji Subhas University of Technology, East Campus
Stackoverflow
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Github Skills (2)
data-structures1
cpp1
Github contributions (5)
tri10256/Leetcode
Jan 2022 - Aug 2022
Contributions:1176 pushes in 6 months
tri10256/Interesting-problems
Oct 2021 - Jan 2025
Contributions:13 pushes in 3 years 3 months
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