Tuan La is a Senior Engineer with 7+ years of hands-on experience in RTL, ASIC/FPGA design, and verification, currently focusing on unit-level verification for Arm Mali GPUs. He brings a rare blend of academic research and industry impact—designing high-frequency FPGA instruments, a 960-bit PUF for hardware fingerprinting, and tooling to detect timing hazards and side-channel risks. At Renesas he accelerated image processing threefold and cut power by 50% through pragmatic RTL and microarchitecture changes, while at Manchester he published multiple papers and improved FPGA DRCs. Comfortable across Verilog/VHDL, C, embedded firmware, scripting, and PCB design, he moves fluidly between silicon, firmware, and verification workflows. Known for creative problem solving (Excellent Engineer Award, customer-facing recognition) he also leverages cloud FPGA environments and custom netlist scanners to harden designs in ways that are not obvious from job titles alone.
7 years of coding experience
12 years of employment as a software developer
Doctor of Engineering Computer Systems Engineering, Doctor of Engineering Computer Systems Engineering at The University of Manchester
Bachelor of Science - BS Physics, Bachelor of Science - BS Physics at Vietnam National University, Hanoi
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