Udit Agarwal
Compiler Engineer at Intel Corporation
British Columbia, Canada
Summary
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Rockstar🎓
Top SchoolUdit Agarwal is a compiler engineer with a decade of experience focused on compiler toolchains, program analysis, and formal verification—currently working on Intel's DPC++ compiler for heterogeneous systems. He blends industry practice from Intel and Huawei with academic rigor from a UBC MS and multiple research publications, having tackled fault-tolerance for DNN accelerators and uncovered real concurrency bugs during a Microsoft research internship. Udit’s hands-on work spans LLVM-based emulation and dynamic binary translation, compiler-aided resilience for neural networks, and CI/runtime improvements for production compilers. Comfortable moving between low-level systems and research, he has a track record of turning formal analysis into practical tooling and reproducible results.
10 years of coding experience
2 years of employment as a software developer
Bachelor's degree, Electrical, Electronics and Communications Engineering, Bachelor's degree, Electrical, Electronics and Communications Engineering at Netaji Subhas Institute of TechnologyMaster of Science - MS, Computer Engineering, Master of Science - MS, Computer Engineering at The University of British Columbia
English, Hindi
Github Skills (71)
sycl10
modular10
intel10
staging10
llvm10
oneapi10
coyote10
toolchain10
dotnet9
refer9
lru9
testing9
clang9
memcached9
llvm-ir9
Programming languages (10)
Github contributions (5)
uditagarwal97/llvm
Jan 2023 - Mar 2025
Intel staging area for llvm.org contribution. Home for Intel LLVM-based projects.
Contributions:83 PRs, 526 pushes, 135 branches in 2 years 2 months
stagingintelllvm
madaari/fio
May 2018 - Aug 2018
Flexible I/O Tester
Contributions:8 PRs, 42 pushes, 2 branches in 2 months
testingflexible
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