Udit Khanna
CPU Design Verification Engineer
Mountain View, California, United States
Summary
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Rockstar🎓
Top SchoolUdit Khanna is a CPU design verification engineer with seven years of experience specializing in memory subsystem microarchitecture and RISC-V CPU verification. He has led unit- and top-level verification for out-of-order and virtual memory features at SiFive and now verifies next-generation Google CPU Load/Store Unit and L1 cache behavior. Skilled across simulation, UVM, hardware emulation, and formal techniques, he builds from-scratch UVM agents, page-table generators, and random instruction sequence frameworks to validate complex VM, interrupt, and exception scenarios. An active contributor to the Rocket Chip open-source generator, he’s patched ECC handling, interrupt flow, and device-tree properties—showing a practical blend of open-source collaboration and silicon-grade rigor. With an MS in ECE (3.9/4.0) and teaching experience in SystemVerilog and emulation, he pairs deep academic grounding with hands-on verification engineering in Mountain View.
7 years of coding experience
4 years of employment as a software developer
High School/Secondary Certificate Programs, High School/Secondary Certificate Programs at Delhi Public School, DwarkaMaster of Science (M.S.), Electrical and Computer Engineering, 3.9/4.0, Master of Science (M.S.), Electrical and Computer Engineering, 3.9/4.0 at Portland State UniversityBachelor of Technology (B.Tech.), Electronics and Communication Engineering, 79.36 | First Class with Distinction, Bachelor of Technology (B.Tech.), Electronics and Communication Engineering, 79.36 | First Class with Distinction at Guru Gobind Singh Indraprastha University
Stackoverflow
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Github Skills (8)
rt10
risc-v10
chisel10
scala10
embedded9
sys9
verification9
hardware-designs9
Programming languages (6)
Github contributions (5)
chipsalliance/rocket-chip
Feb 2019 - Oct 2020
Rocket Chip Generator
Role in this project:
Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:10 commits, 9 PRs, 7 pushes in 1 year 7 months
Contributions summary:Udit made several contributions related to the Rocket Chip Generator, focusing on hardware design and verification. They modified code related to error correction, including defining an enumeration for `OMECC`. They also fixed interrupt handling, added types to a bus memory module, and conditionally generated page fault and exception covers. Finally, they added `pmpgranularity` to the device tree.
rtlriscvchipchiselscala
khannaudit/git-test
Jul 2018 - Jul 2018
Contributions:4 pushes, 2 branches in 1 day
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