Uroš Legat
Senior FPGA Engineer at Cosylab d.d.
Ljubljana, Slovenia
Summary
👤
Senior🎓
Top SchoolUroš Legat is a Senior FPGA Engineer and systems architect with 11 years of professional experience and a PhD-focused research background in digital circuit reliability. He has designed control systems for large-scale physics facilities—including particle accelerators, neutron and light sources, and medical therapy machines—bringing deep expertise in Xilinx/Altera/Microsemi FPGAs, multi-gigabit SERDES, and high-speed memory and serial interfaces. His work spans advancing online testing, self-repair techniques, and fault-injection methods, bridging research-grade reliability approaches with production control hardware. Comfortable from RTL simulation to low-level API and test script development, he also mentors junior engineers and performs hands-on hardware debugging. Based in Ljubljana, he combines academic rigor with practical delivery on mission-critical systems used at labs like SLAC.
11 years of coding experience
7 years of employment as a software developer
Univ. dipl. ing., Electrical engeneering - Robotics, Univ. dipl. ing., Electrical engeneering - Robotics at University of LjubljanaHigh school, General Studies, High school, General Studies at Jesenice high schoolDoctor of Philosophy (PhD), Electrical and Electronics Engineering, Doctor of Philosophy (PhD), Electrical and Electronics Engineering at Jozef Stefan postgraduate school
English, German, French
Stackoverflow
31reputation
815reached
2answers
0questions
Github Skills (8)
firmware10
fpga10
hdl10
lattice10
asic10
python10
vhdl10
xilinx6
Programming languages (1)
Github contributions (5)
slaclab/smurf-pcie
Nov 2015 - Jun 2017
Contributions:188 commits in 1 year 7 months
slaclab/amc-carrier-core
Oct 2015 - Jul 2017
Contributions:145 commits in 1 year 8 months
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