Summary
Utkarsh Saxena is a Member of Technical Staff at AMD with nine years of experience in efficient ML model design and hardware-aware optimization, currently contributing to AMD’s Efficient GenAI team. He completed a PhD in Electrical and Electronics Engineering at Purdue, where his research focused on quantization, sparsity, and low-rank decomposition to make ML models more efficient for hardware deployment. His background includes internships at d-Matrix and Texas Instruments working on low-precision quantization for large language models and recurrent networks, as well as earlier device- and RF-focused research at IIT Bombay and IISER Kolkata. Combining deep academic research with practical system-level experience, he specializes in bridging algorithmic model compression and accelerator-friendly implementations. Notably, his trajectory shows a consistent emphasis on squeezing more performance out of constrained hardware—an asset for teams shipping production-scale GenAI.
9 years of coding experience
6 years of employment as a software developer
Indian Institute of Technology Delhi (IIT Delhi)
Doctor of Philosophy - PhD, Electrical and Electronics Engineering, Doctor of Philosophy - PhD, Electrical and Electronics Engineering at Purdue University