Valentin聽Thomazic
Apprenti Design & Verification
Grenoble, Auvergne-Rh么ne-Alpes, France
Summary
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Rockstar馃帗
Top SchoolValentin Thomazic is an early-career design and verification engineer based in Grenoble, combining hands-on hardware verification work at Thales Silicon Security with DevOps and automation expertise showcased in contributions to the open-source CORE-V CVA6 RISC-V project. With a diploma in Mathematics and Computer Science from Grenoble INP - Ensimag and practical full-stack development experience, he bridges software tooling and hardware simulation to streamline CI/CD and test reporting. His background includes leading IT systems at a student consultancy and shipping UI features for digital library management, reflecting both technical breadth and product-oriented delivery. Notably, he improved build automation and introduced tandem simulation approaches in a project used to boot Linux on RISC-V, signaling a focus on reliable, reproducible hardware-software workflows.
2 years of coding experience
DUT, Informatics, DUT, Informatics at IUT de ValenceDipl么me d'ing茅nieur, Mathematics and Computer Science, Dipl么me d'ing茅nieur, Mathematics and Computer Science at Grenoble INP - Ensimag
Github Skills (15)
sh10
automation10
github-ci10
script10
automations10
shell10
githubaction-workflow10
devops10
scripting10
cicd10
testing9
risc-v9
verilog8
systemverilog-hdl8
python7
Programming languages (2)
Github contributions (5)
openhwgroup/cva6
Nov 2023 - Apr 2025
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
Role in this project:
DevOps Engineer & Automation Engineer
DevOps Engineer & Automation EngineerContributions:8 reviews, 47 PRs, 117 comments in 1 year 5 months
Contributions summary:Valentin primarily focused on improving the continuous integration and continuous deployment (CI/CD) pipeline and automation scripts within the repository. Their contributions included modifying build scripts, setting default values for environment variables across scripts, and fixing issues in the reporting and testing processes. Furthermore, they addressed version control issues and enhanced the reporting of test results on the dashboard, indicating a strong emphasis on automation and build infrastructure. The user also focused on the introduction of a tandem simulation system.
cpurisc-vasicbootingariane
valentinThomazic/cva6
Nov 2024 - Mar 2025
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
Contributions:23 pushes, 3 branches in 3 months
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