Summary
Viktor Teren is an R&D Staff Member at Synopsys with 11 years of experience bridging academic research and industrial engineering. He holds a Ph.D. in Computer Science from the University of Verona, where he focused on synthesizing synchronizing Petri net sets and ensuring safe synchronization—work that underpins reliable concurrent and embedded systems. Viktor combines formal methods expertise with hands-on development, shaped by internships and roles across Europe including UPC and Fincons Group. Based in Veneto, Italy, he brings a rigorous, experiment-first philosophy to problem solving and a track record of translating theoretical models into practical R&D outcomes.
11 years of coding experience
Master's degree in Computer Science, Embedded Systems course, 110/110 cum Laude, Master's degree in Computer Science, Embedded Systems course, 110/110 cum Laude at Università degli Studi di Verona
High school diploma, Computer Science, 80/100, High school diploma, Computer Science, 80/100 at ITIS Marconi
Ph.D., Computer science, Excellent, Ph.D., Computer science, Excellent at University of Verona
Internship, Computer Science, Internship, Computer Science at Universitat Politècnica de Catalunya (UPC)
Italian, Russian, ucraino, English