Visakh Ajith
Cambridge, England, United Kingdom
Summary
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SeniorVisakh Ajith is a Senior Software Engineer with nine years’ experience building low-level storage systems and machine learning performance pipelines, currently focused on ML systems analysis at Arm in Cambridge. He began his career developing RAID, scan-and-recovery, and metadata recovery features in C for Dell EMC’s PowerMax OS, grounding him in OS internals, data structures, and reliability engineering. With an MSc in Artificial Intelligence from the University of St Andrews, he has applied probabilistic models, constraint programming, and deep learning to research and product problems. At Arm he blends high- and low-level IP analysis, CI/CD automation, and device farm management to validate accuracy and performance across software and hardware. He has also coached students in data structures and algorithms through mock interviews, reflecting a commitment to mentoring and technical communication. Colleagues describe him as a pragmatic engineer who pairs systems-level rigor with ML-aware performance thinking.
9 years of coding experience
Github Skills (3)
convolutional-neural-networks4
react2
openpose1
Programming languages (3)
Github contributions (5)
visakh7843/visakh7843.github.io
Jul 2017 - Jul 2020
Contributions:12 pushes, 1 branch in 2 years 11 months
visakh7843/Fall-Detection
Aug 2018 - Aug 2018
Contributions:1 commit, 1 branch in 1 day
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