Summary
Vishakh Rayapeta is a senior technical staff engineer based in Taipei with 25+ years of deep domain expertise in semiconductors, FPGA architecture, timing closure, and edge AI applications. Currently leading application engineering at Microchip, he combines hands-on board bring-up, RTL/timing optimization and customer-facing support to close complex protocol and networking designs. His background spans roles at Microsemi, Synplicity and networking startups where he influenced synthesis tool features and mentored engineering teams to take ownership of delivery. Academically grounded with an MS in Computer Engineering and further studies in machine learning and embedded RTOS design, he blends hardware-software fluency with practical ML knowledge. An unexpected thread through his career is a parallel creative practice in cinematography and photography, reflecting a knack for visual problem-solving and customer-driven storytelling.
10 years of coding experience
19 years of employment as a software developer
Machine Learning Nano Degree, Machine Learning, Machine Learning Nano Degree, Machine Learning at Udacity
MS, Computer Engineering, MS, Computer Engineering at University of California Santa Barbara
Designing Embedded Software Using Real-Time Operating Systems, Designing Embedded Software Using Real-Time Operating Systems at UC Irvine, Extension
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering, Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering at Osmania University
Master's degree, Computer Science, A, Master's degree, Computer Science, A at Georgia Institute of Technology