Vishant
Sr. Lead Engineer at Qualcomm
Bengaluru, Karnataka, India
Summary
👤
Senior🎓
Top SchoolVishant is a Sr. Lead Engineer with 10+ years of hands-on ASIC verification experience at Qualcomm, specializing in SystemVerilog and Verilog for complex memory and MMU subsystems. He has designed end-to-end verification environments (generator/driver/monitor/scoreboard), built SV checkers and functional coverage for MMU prefetcher logic, and implemented checker models for associative caches using OVM/UVM on Linux and Windows. Comfortable with industry toolchains (ModelSim, QuestaSim, VCS, Verdi) and ClearCase, he brings deep practical knowledge of AXI-based designs and bus verification. Notably, he combines low-level HDL expertise with a systems view of verification flow, making him effective at turning subtle microarchitecture requirements into robust testbench infrastructure.
10 years of coding experience
4 years of employment as a software developer
Bachelor of Technology (BTech), Electrical, Electronics and Communications Engineering, Bachelor of Technology (BTech), Electrical, Electronics and Communications Engineering at MIET meerutMaster of Technology (MTech), VLSI and microelctronics, Master of Technology (MTech), VLSI and microelctronics at MNNIT allahabad
English, Hindi
Github Skills (36)
github-enterprise10
javascript9
open-source9
github8
css8
quest7
constructors7
fizzbuzz6
runnable6
inheritance6
jframe6
jack6
maven5
thread5
svg5
Programming languages (4)
Github contributions (5)
Vishant93/Vishant93.github.io
Aug 2015 - Jan 2021
Contributions:27 pushes, 2 branches in 5 years 5 months
Vishant93/DogRegistration
Aug 2020 - Nov 2020
A basic full-stack application for registering dogs
Contributions:4 PRs, 9 pushes, 2 branches in 3 months
reactexpressjsfull-stackexpressnodejs
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