Vladislav Sharshin
FPGA Developer at Syntacore
Stockholm, Sweden
Summary
👤
Senior🎓
Top SchoolVladislav Sharshin is an FPGA developer with a Master of Engineering and over nine years of hands-on experience designing high-performance FPGA and SoC solutions across telecom and defense domains. He has deep RTL expertise in Verilog/SystemVerilog, Quartus and Vivado flows, ModelSim/QuestaSim, and a practical command of C/C++, MATLAB and TCL for verification and tooling. His background includes end-to-end SoC integration (UART, Ethernet, PCIe, DDR) and DSP/image-processing blocks on both Altera and Xilinx UltraScale families, and he led teams delivering certified Ethernet test equipment and commercial products. At Syntacore and AFRY he’s implemented processor cores and complex FPGA systems, while earlier roles saw him responsible for full FPGA design flows and managing developer workflows and repositories. He earned a silver award for an HDR-video project at InnovateFPGA (Intel/Terasic), reflecting a knack for rapid, competition-grade prototyping. Based in Stockholm, he combines hands-on implementation with system-level integration skills and a track record of shipping fielded, measurement-grade devices.
9 years of coding experience
5 years of employment as a software developer
Master of Engineering (M.Eng.), Monitoring of Object Status, Master of Engineering (M.Eng.), Monitoring of Object Status at Санкт-Петербургский Государственный Электротехнический Университет «ЛЭТИ»
Русский, EnglishGithub contributions (4)
sh-vlad/FPGA_rtime_HDR_video
Feb 2018 - Nov 2018
Contributions:53 commits, 21 pushes, 16 branches in 9 months
sh-vlad/FPGA_real_time_depth_estimation_based_on_neural_network
Jun 2019 - Jul 2020
Contributions:28 commits, 1 PR, 3 pushes in 1 year 1 month
Find and Hire Top DevelopersWe’ve analyzed the programming source code of over 60 million software developers on GitHub and scored them by 50,000 skills. Sign-up on Prog,AI to search for software developers.