Wen Chen is a Principal Member of Technical Staff at AMD in Austin with eight years of industry experience building machine-learning-driven verification and design enablement tooling for SoCs. He has led cross-company methodologies at NXP, serving as the functional safety and EDA tooling point-of-contact while shaping vendor roadmaps and industry working groups. Wen’s work uniquely blends graph-based coverage generation, ML-powered failure triage, and security verification to accelerate first‑time‑right silicon delivery. He holds a PhD in Computer Engineering and has a strong academic-to-industry track record of transferring research (from UCSB and Michigan) into production verification flows. Colleagues rely on him for pragmatic architecture decisions that marry research innovations with large-scale engineering constraints.
7 years of coding experience
10 years of employment as a software developer
Master of Science (M.S.), Computer Science and Engineering, Master of Science (M.S.), Computer Science and Engineering at University of Michigan
Doctor of Philosophy (Ph.D.), Computer Engineering, Doctor of Philosophy (Ph.D.), Computer Engineering at UC Santa Barbara
Bachelor of Science (B.S.), Electrical and Electronics Engineering/Chu Kochen Honors College, Bachelor of Science (B.S.), Electrical and Electronics Engineering/Chu Kochen Honors College at Zhejiang University
中译版 Parallel Programming for FPGAs -- An open-source high-level synthesis book. Fork from https://github.com/KastnerRG/pp4fpgas
Contributions:3 PRs, 26 pushes in 3 months
high-level-synthesisasicvivadofpgasparallel
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Wen Chen - Principal Member Of Technical Staff at AMD