Werner S

Senior Project Manager at Raiffeisen Schweiz

Zurich, Zurich, Switzerland
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Summary

👤
Senior
🎓
Top School
Werner S is a Zurich-based Senior Project Manager with over 11 years in IT project leadership and more than three decades of experience across banking, audit, and consulting. He blends deep expertise in data analysis, process design and IT audit with hands-on leadership of IT business analysis and fraud examination teams, delivering auditable, risk-aware projects for large financial institutions. His background includes senior roles at Raiffeisen, Julius Baer and ABN AMRO and a Masters in Economic Crimes Investigation, giving him a rare mix of technical, regulatory and investigative skills. Unusually for a project executive, he also contributes to low-level embedded systems work in open-source coreboot, demonstrating a pragmatic comfort with both high-level program governance and hardware-level engineering. This combination makes him adept at translating complex technical controls into clear, client-focused outcomes.
code11 years of coding experience
job24 years of employment as a software developer
bookMatura, Typus C, Matura, Typus C at Kantonsschule Im Lee
booklic. oec. publ., Wirtschaftsinformatik, lic. oec. publ., Wirtschaftsinformatik at University of Zurich
bookMaster of Advanced Science, Economic Crimes Investigation, Master of Advanced Science, Economic Crimes Investigation at University of Lucerne
languagesEnglish, German, French
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Github Skills (15)

c1710
firmware10
i2c10
embedded10
low-level-programming10
device-driver10
c1110
sys10
acpi9
rtc9
bootloader9
real-time-clock9
assembly8
gpio8
x868

Programming languages (1)

C

Github contributions (5)

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coreboot/coreboot

Feb 2015 - Jan 2023

Read-only mirror of https://review.coreboot.org/coreboot.git. Synced every hour. We don't handle Pull Requests.
Role in this project:
userEmbedded Systems Engineer
Contributions:326 commits in 8 years
Contributions summary:Werner Zeh's contributions primarily focus on the low-level embedded systems aspects of the coreboot project. His work includes implementing and refining drivers for hardware components such as the RTC RX6110SA and the I/O expander PCA9538, modifying GPIO configurations, and ensuring proper power management for various components. He also made improvements to the low-level functionalities such as enabling the bus master bit for I210 and setting the bootblock address.
corebootfirmwarereviewpull-requestsbootloader
pcengines/coreboot

May 2022 - May 2022

github mirror of coreboot.org's master repository
Contributions:8 commits in 18 days
corebootmastergithub-mirror
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