Summary
Wesley Lo is a Senior Digital Design Engineer based in Milpitas, California with over a decade of hands-on experience delivering complex multi-million-gate SoC and ISP designs for consumer image, video and audio products. He combines RTL development, FPGA emulation (Xilinx and Altera), and gate-level verification with practical lab skills in PCB debugging and sensor characterization, having worked extensively with OmniVision and Aptina image sensors. Wesley has led projects from algorithm-to-ASIC, implementing demosaic, AWB, noise reduction, HDR and other ISP blocks, and he is fluent in EDA flows, STA, synthesis and bus protocols like AHB/I2C/DDR. His background also includes analog IC design at TSMC processes and embedded audio/DSP work, giving him a rare full-chain perspective from transistor to system. Known for a methodical testing/debugging approach and fast learning in high-paced environments, he frequently bridges cross-functional teams to ship production silicon. A practical detail not obvious from titles: he routinely drives FPGA emulation to validate sensor modes and timing scripts across multiple resolution and HDR formats before tapeout.
10 years of coding experience
8 years of employment as a software developer
MS, Electrical and Computer Engineering, MS, Electrical and Computer Engineering at Syracuse University
MS, Electrical and System Engineering, MS, Electrical and System Engineering at University of Pennsylvania