Xiaonan Tian is a Senior GPU Compiler Engineer with over 12 years of systems and compiler development experience, now leading CUDA C++ and OpenACC compiler work in NVIDIA’s HPC SDK. He combines deep academic research—holding a Ph.D. focus in high performance computing and compiler optimization—with hands-on toolchain and firmware engineering across MIPS, custom RISC SIMD, and embedded USB microcontrollers. At NVIDIA he architects compiler frameworks and optimizations that bridge OpenACC and CUDA/C++/Fortran, building on prior contributions to OpenUH and NAS Parallel Benchmarks that delivered competitive performance vs. commercial compilers. His background includes semiconductor IC verification and upstream GNU toolchain porting, giving him a rare end-to-end perspective from hardware validation to high-level parallelization. Based in Portland, he pairs research-grade compiler techniques with production GPU engineering to accelerate real-world HPC workloads.
12 years of coding experience
9 years of employment as a software developer
Doctor of Philosophy (Ph.D.), High Performance Computing, Compiler Optimization, GPU Computing, OpenMP, OpenACC, Doctor of Philosophy (Ph.D.), High Performance Computing, Compiler Optimization, GPU Computing, OpenMP, OpenACC at University of Houston
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Xiaonan Tian - Senior GPU Compiler Engineer at NVIDIA