Xuming Zhou is a Design Engineer based in California with 11 years of experience specializing in ASIC and FPGA design for wireless SoCs, including deep expertise in 802.11 a/b/g/n/ac/ax MAC implementations. He has led frontend ASIC development, FPGA-based SOC emulation, and complex subsystems such as digital beamforming and a 128-bit GCMP AES engine across companies like NXP, Marvell, and Tensorcom. Comfortable across RTL and gate-level simulation, chip bring-up, and DMA/CPU integration, he bridges hardware design and lab-level verification to accelerate time-to-silicon. Known as a hardworking, easy-going team player, he brings practical pragmatism—“Make a decision and keep on”—to high-stakes delivery and cross-functional debugging.
11 years of coding experience
8 years of employment as a software developer
B.S, Communication Engineering, B.S, Communication Engineering at Shanghai University
Master's, Electrical Engineering, Master's, Electrical Engineering at ILLINOIS INSTITUTION of TECHNOLOGY
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Xuming Zhou - Design Engineer at NXP Semiconductors