Yawen Yang is a Graphics Software Engineer with nine years of experience building video decode SDKs, drivers, and deep learning tooling at Intel after an early engineering role at Fujitsu. Based in Shanghai, she blends low-level graphics and driver development with compiler- and backend-focused ML engineering, contributing notable optimizations to the widely used Apache TVM project (multi-blocking layouts, bfloat16 support, and DNNL BYOC enhancements). Her work demonstrates a pragmatic balance of performance engineering and algorithmic insight, enabling efficient data layouts and in-place operations for production workloads. Comfortable across hardware-near code and high-level ML compiler stacks, she brings cross-domain fluency that helps move models from prototype to optimized deployment.
Open deep learning compiler stack for cpu, gpu and specialized accelerators
Role in this project:
Back-end Developer
Contributions:15 reviews, 8 commits, 9 PRs in 8 months
Contributions summary:Yawen made significant contributions to the TVM compiler stack, focusing on the backend and optimization aspects. Their work includes adding support for multi-blocking layout transformations, enhancing bfloat16 support in the compiler and relay modules, and integrating in-place post-op sum functionality within the DNNL BYOC backend. They also contributed to improving the handling of data layouts and performing simplification of expressions within the compilation pipeline.
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Yawen Yang - Graphics Software Engineer at Intel Corporation