Summary
Yee Tan is a Digital Hardware Developer with 8 years of experience and 4+ years focused on FPGA design, currently building high-speed, multi-clock-domain architectures for RF and high-power plasma/laser generators at TRUMPF in Freiburg. He combines RTL design and DSP algorithm development with rigorous verification using Riviera-PRO/ModelSim/GHDL and testbenches (VUnit, OSVVM, UVVM), and closes the loop with hardware validation via ILA, oscilloscopes and thermal/power measurement. His background includes prototyping a scaled-out NoC-connected neuromorphic BNN accelerator that delivered an order-of-magnitude speedup in hybrid emulation and hands-on experience with Xilinx Zynq UltraScale+ and Versal platforms. Comfortable implementing embedded C software and building mathematical verification models across RF, control, and power-electronics domains, he is adept at translating complex physical-system requirements into verifiable FPGA solutions. Notably, he has deep practical experience debugging RTL-level deadlocks and shipping designs used in on-site support for plasma etching customers.
7 years of coding experience
1 year of employment as a software developer
Master of Science - MS, Electrical Engineering, Information Technology and Computer Engineering, Master of Science - MS, Electrical Engineering, Information Technology and Computer Engineering at RWTH Aachen University
Bachelor of Science - BS, Electrical and Electronics Engineering, Bachelor of Science - BS, Electrical and Electronics Engineering at University of Duisburg-Essen
Chinese, English, German, Malay