Yestin
Java Developer
Beijing, China
Summary
👤
SeniorYestin is a seasoned Java developer and VLSI specialist with 11 years of experience bridging semiconductor design and software engineering. He has led teams and projects across major Chinese research and industry labs—driving low-power 65nm/90nm designs at Hisilicon, architecting multi-million-transistor FP functional units at a high-performance IC center, and developing structured ASIC flows as a research assistant at CUHK. Holding a PhD focus in VLSI and communications from CUHK and dual bachelor’s degrees from Tsinghua and Beijing Institute of Technology, he combines deep hardware design knowledge with practical software skills. His background in multi-power-domain and retention-memory techniques gives him a rare perspective on power-aware system design that benefits both silicon and software stacks. Based in Hong Kong, he blends academic rigor with production experience and a track record of leading cross-discipline engineering teams.
10 years of coding experience
Github Skills (26)
filepicker9
datepicker8
mysql-binlog8
mysql-server8
binlog8
mysql7
leaf7
exoplayer6
timepicker6
mongodb-cluster5
pickerview5
ffmpeg5
java5
react-native4
android4
Programming languages (1)
Github contributions (5)
yestin0303/WaveView
Nov 2016 - Nov 2016
Contributions:9 commits, 4 pushes, 1 branch in 1 day
narci2010/commonDemo
Aug 2017 - Oct 2017
Contributions:4 commits in 1 month
spring-bootredisdisruptorreactorredis-cluster
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