Summary
Yong Chen is a seasoned GPU hardware verification and architecture leader with over two decades of hands-on experience driving GFX IP and SoC development from early Trident days through ATI/AMD and now at Samsung SARC/SACL. He has built and led cross-site subsystem teams across Shanghai, Orlando, Markham, Santa Clara and Austin, delivering RDNA and CDNA projects while establishing DV best practices and quality initiatives. Technically fluent in SystemVerilog, UVM, coverage-driven closure, HVP and C-modeling, he remains deliberately hands-on to stay close to implementation details and mentor engineers effectively. Yong’s career uniquely combines foundational GPU architecture work with long-term DV leadership, giving him rare visibility from shader engine design to GC-level verification. Based in Austin, he is known for turning complex verification challenges into repeatable processes that improve project predictability and execution. An early builder of AMD’s Shanghai GFX presence, he blends global team-building experience with deep technical credibility.
10 years of coding experience
10 years of employment as a software developer
Master's degree Computer Science, Master's degree Computer Science at Zhejiang University