Yu-chien Lin
Senior Software Engineer at SiFive
Kaohsiung Metropolitan Area Taiwan
Summary
👤
Senior🎓
Top SchoolYu-chien Lin is a Senior Software Engineer with a decade of experience specializing in Embedded Linux and RISC-V platform bring-up. Based in Kaohsiung, Taiwan, he has driven upstream contributions to OpenSBI, U-Boot and the Linux kernel while porting BSPs and distro images for Andes AE350 platforms and other RISC-V SoCs. At Andes he focused on firmware/bootloader/kernel debugging, driver ports, and Yocto/Buildroot/OpenWrt recipes; he now continues platform-level engineering at SiFive. His open-source work includes adding platform initialization, timers, IPI, reset drivers and domain support to OpenSBI and aligning U-Boot/Linux recipes for reliable boot on AE350, showing a blend of deep low-level systems skill and practical release engineering. Trained with an MEng in Electrical Engineering from National Taiwan University, he uniquely bridges hardware-aware firmware work with production Linux distribution pipelines.
10 years of coding experience
4 years of employment as a software developer
Bachelor of Engineering - BE, Electrical Engineering, Bachelor of Engineering - BE, Electrical Engineering at 國立中興大學Master of Engineering - MEng, Electrical Engineering, Master of Engineering - MEng, Electrical Engineering at 國立臺灣大學
Github Skills (27)
timers10
buildroot10
controller10
risc-v10
timer10
c-programming10
linux-kernel10
yocto10
interrupt10
initialization10
device-tree10
initializer10
u-boot10
driver10
sys10
Programming languages (21)
Github contributions (5)
riscv/meta-riscv
Aug 2022 - Nov 2022
OpenEmbedded/Yocto layer for RISC-V Architecture
Role in this project:
Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:16 reviews, 13 commits, 8 PRs in 3 months
Contributions summary:Yu-chien primarily contributes to the `riscv/meta-riscv` repository by adding and modifying U-Boot and Linux kernel recipes for the AE350-AX45MP platform, which is related to RISC-V architecture. Their work involves porting and adapting U-Boot code, including patches to fix boot failures, align device tree addresses, and support the OpenSBI fdt driver. The user also contributed a recipe for the Linux kernel and specified the OpenSBI revision. These changes indicate a focus on building and configuring software for embedded RISC-V systems.
risc-vyocto-metaopenembedded-layerriscvyocto-layer
riscv-software-src/opensbi
Oct 2022 - Jan 2023
RISC-V Open Source Supervisor Binary Interface
Role in this project:Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:24 commits, 2 comments in 3 months
Contributions summary:Yu-chien primarily contributed to the OpenSBI project, focusing on platform-specific implementations for Andes AE350. Their work involved adding support for platform initialization, including console and interrupt controller setup, and integrating new hardware features such as timers, IPI, and reset drivers. They also addressed code quality, fixing typos, and improving documentation. The user also added domain support.
risc-vriscvriscsupervisor
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