Liu Yun
Nanjing City, Jiangsu, China
Summary
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SeniorYun Liu is a device modeling leader with 12+ years of experience driving compact and behavioral model development for memory technologies, currently serving as Director/Principal Engineer at Intel in Sunnyvale. He combines deep semiconductor device physics expertise—CMOS, BJT, passives, LDE, mismatch and noise modeling—with hands-on characterization (DC/CV/RF/noise) and automated extraction workflows. Yun has a strong track record of building model libraries and Monte Carlo/reliability flows for NAND and 3DXP, and has led cross-functional teams delivering production-ready BSIM, Verilog-A, and BEOL models. He pairs lab and CAD proficiency (Cadence, Keysight ADS, ICCAP, LabVIEW, JMP, MATLAB, Linux scripting) to shorten project timelines through automation and tooling. Notably, he devised physical-data-driven corner and statistical modeling methods that slashed manual effort and institutionalized new practices across teams. His background spans both device R&D and managerial leadership, bridging measurement, modeling, and design for high-speed and RF applications.
12 years of coding experience
Github Skills (30)
crosswalk10
google-chrome10
dom10
testing9
microsoft-edge9
opera9
browserstack9
web-platform9
safari9
javascript9
snippet9
gecko9
browser9
test-runner9
blink9
Programming languages (2)
Github contributions (5)
yunxliu/crosswalk-test-suite
Jan 2015 - May 2016
Contributions:1 PR, 875 pushes, 241 branches in 1 year 4 months
yunxliu/demo-express
Jan 2015 - May 2016
Contributions:1 PR, 64 pushes, 21 branches in 1 year 4 months
reactnodejscrosswalktypescriptshowcase
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