Yunsik Choi is a Staff Engineer based in Seoul with 11 years of analog/mixed-signal IC design experience, specializing in high-speed interfaces from LVDS and USB2.0 to PCIe Gen5/6. He has driven TX/RX front-ends, BGRs, LDOs, clock generators, EQ, CDR and subsampling PLL designs across LG and Samsung, blending circuit-level rigor with system-level interface expertise. Proficient in Verilog-A and MATLAB, he bridges behavioral modeling and silicon implementation to accelerate PHY development and validation. His career shows steady progression from senior research engineer to staff-level contributor at Samsung, reflecting both technical depth and cross-company impact. Notably, he pairs hands-on analog design with high-speed link system optimization—an uncommon combination that speeds time-to-market for next-generation interfaces.
11 years of coding experience
5 years of employment as a software developer
Master's degree, Electronics Engineering, Master's degree, Electronics Engineering at 중앙대학교
Contributions:520 commits, 516 pushes, 3 branches in 7 years 6 months
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