Zachary Krueger is a Senior Design Verification Engineer based in Minneapolis with 11 years of experience specializing in ASIC verification and automation. He has advanced expertise in SystemVerilog, UVM, SVUnit, and Python scripting, honed through multi-year roles at Micron and his current position at ForwardEdge ASIC. Zachary consistently bridges collaborative design and verification teams to deliver robust, automated regression flows and efficient triage processes for complex chips. He graduated from the University of Minnesota with a strong academic record (3.85 GPA) and brings hands-on systems software experience from earlier internships and C development. Known for combining meticulous test methodology with practical tooling, he brings an engineer’s rigor to both debug and process improvement. Outside of work, his background in teaching and customer-facing roles suggests strong communication and mentorship capabilities that accelerate team productivity.
11 years of coding experience
6 years of employment as a software developer
University of Minnesota Twin Cities
High School Diploma, General Studies, High School Diploma, General Studies at Richfield Senior High School
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