Summary
Zavosh Mottahedeh is an FPGA/ASIC digital design engineer and founder with 10 years of experience blending hardware architecture, embedded software, and data engineering. He holds an MS in Computer Science from Stony Brook University where he helped build Argus, an end-to-end FPGA accelerator framework for CNNs, contributing across drivers, HBM memory systems, and multi-core hardware design. As Founder and CEO of a stealth AI startup in San Francisco, he pairs research-grade hardware acceleration expertise with product-minded leadership. His background includes hands-on firmware and system work—writing Python-C++ wrappers for FPGA modules and patching FreeRTOS memory leaks—and large-scale geospatial data engineering for renewable energy research. Comfortable teaching and mentoring across universities, he brings both academic rigor and practical delivery to complex hardware–software projects. Notably, his career traces a throughline from Verilog-based digital system projects to production-focused accelerator implementations.
10 years of coding experience
4 years of employment as a software developer
Bachelor of Science - BS Computer Engineering, Bachelor of Science - BS Computer Engineering at Sharif University of Technology
High School Diploma Mathematics and physics, High School Diploma Mathematics and physics at Atomic Energy High School
Astronomy and Astrophysics Olympiad, Astronomy and Astrophysics Olympiad at Young Scholar Club
Master of Science - MS Computer Science, Master of Science - MS Computer Science at Stony Brook University
Persian, English