Zechao Li
Senior ASIC Design Engineer at NVIDIA
Ann Arbor, Michigan, United States
Summary
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Senior🎓
Top SchoolZechao Li is a Senior ASIC Design Engineer with 8 years of experience building high-performance silicon, now working on Tegra memory subsystems at NVIDIA after ASIC and NPU work at Black Sesame. A University of Michigan MS graduate, he combines hands-on RTL design, verification, and system-level debugging with a demonstrated ability to optimize embedded systems (e.g., cutting BLE transfer time from 28 hours to 15 minutes). He has practical experience across UART/SPI interfaces, power-conscious microsystems, and PCB/algorithm prototyping, showing both low-level digital craft and system integration skills. Focused on deepening his ASIC expertise, Zechao also aspires to translate technical mastery into product and business impact in the long term.
8 years of coding experience
2 years of employment as a software developer
Master of Science in Electrical Engineering, Electrical and computer Engineering, Master of Science in Electrical Engineering, Electrical and computer Engineering at University of MichiganBishop England High SchoolPhysics, Physics at Rensselaer Polytechnic Institute
English, Chinese, SpanishGithub contributions (5)
ZechaoLi/Business-intelligence
Aug 2020 - Feb 2021
Contributions:22 commits, 20 pushes in 6 months
ZechaoLi/assignment
May 2018 - May 2018
Contributions:20 pushes, 1 branch in 14 days
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