Zhen Wei
Staff Performance Architect at SiFive
Taoyuan City, Taiwan
Summary
👤
Senior🎓
Top SchoolZhen Wei is a Staff Performance Architect with nine years of experience designing software that architects hardware, currently driving performance modeling and microarchitectural exploration at SiFive. He specializes in RISC-V vector architectures, having developed instruction-level simulators, vector load-store unit models, and tooling that bridges RTL, performance models, and compilers to accelerate iteration and correlation. Zhen has a strong record of cross-functional collaboration—partnering with architects, RTL designers, and compiler teams—to evaluate tradeoffs in performance, area, and power for cores like P670/P870 and X280/P270. His background combines academic research on Cray-style and modern vector units with hands-on engineering at SiFive, where he contributed to MAP, the open-source CPU simulation framework. Based in Taoyuan City, Taiwan, he brings a pragmatic blend of simulation, modeling, and software engineering to squeeze real-world performance from vector hardware.
9 years of coding experience
6 years of employment as a software developer
Master's degree, Computer Science, Master's degree, Computer Science at 國立臺灣大學Bachelor's degree, Transportation Science, Bachelor's degree, Transportation Science at 國立成功大學
English, Chinese
Github Skills (117)
risc10
opcodes10
iota10
phonebook10
fpga10
pow10
simulation10
modeling-tool10
agent-based-modeling10
modeling10
agent-based-simulation9
eclipse9
performance-analysis9
risc-v9
amalgamation9
Programming languages (10)
Github contributions (5)
chenwei-tw/iri
Feb 2018 - Sep 2018
IOTA Reference Implementation
Contributions:14 pushes, 9 branches in 7 months
iotareference-implementation
sifive/BSC-RVV
Oct 2021 - Jan 2022
RiVEC Bencmark Suite
Contributions:4 reviews, 2 PRs, 12 pushes in 2 months
suitezones
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