Zheng Jiang
Railway Signalling Enginner And Software Developer at SafeRail SAS
Greater Paris Metropolitan Region France
Summary
👤
Senior🎓
Top SchoolZheng Jiang is a railway signalling engineer and software developer with nine years of experience building safety-critical tools for rail operators and suppliers in the Greater Paris region. He designs and implements end-to-end platforms—from tablet and desktop field apps to back-office systems—combining C++14/Qt, database modeling, and functional logic in OCaml to deliver dematerialized maintenance and quality-control workflows. His work spans generic signaling core architecture using UIC RailTopoModel, bespoke simulators for timetable and punctuality analysis, and CAD tooling for high-speed line signaling programs. Comfortable bridging domains, he also translates technical documentation across French, English and Chinese, which helps accelerate cross-border projects. Colleagues value his blend of hands-on coding, formal modeling and practical railway know-how that reduces on-site complexity. An engineer by training (Guangdong University of Technology; ENSEA), he quietly pairs low-level kinematics modeling with user-focused interfaces to make complex signalling rules usable in the field.
9 years of coding experience
4 years of employment as a software developer
Engineer's Degree, Automatics & Power Electronics, Engineer's Degree, Automatics & Power Electronics at ENSEAB.S, Electrical Engineering, B.S, Electrical Engineering at Guangdong University of Technology
Chinese, French, English, Chinese
Github Skills (68)
audio10
raytracing10
gltf9
pbr9
tooling9
lua9
vite9
frontend9
bullet-physics9
dev-server9
vulkan9
entity-component-system9
fbx9
opengl8
game-engine8
Programming languages (7)
Github contributions (5)
Enzojz/shader_mod_1
Jan 2019 - Sep 2024
Contributions:1 release, 11 pushes, 3 branches in 5 years 9 months
Enzojz/ultimate_station_1
Nov 2017 - Aug 2019
Contributions:19 releases, 134 pushes, 2 branches in 1 year 9 months
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