Process Integration TD Engineer Advanced Packaging
Hillsboro, Oregon, United States
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Summary
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Senior
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Top School
Zhi Li is a Process Integration TD Engineer specializing in advanced packaging with 13 years’ experience and 9+ years focused on semiconductor R&D, production ramp and technology transfer at Intel. He leads Foveros wafer and packaging assembly development and has driven yield-improving, data-driven process optimizations across TSV, 3D and wafer-level packaging. Skilled in statistical process control, DOE and tooling collaboration, he combines hands-on fab troubleshooting with scripting and data analysis (Python, JSL, SQL, JMP, PBI, SAP BI4) to close process gaps. Zhi has chaired cross-functional technology matching forums and repeatedly translated lab-scale innovation into high-volume manufacturing readiness. His background in chemical engineering (Ph.D., University of Florida) and early environmental and chemical industry internships give him a broad systems perspective that informs durable, manufacturable solutions. Based in Hillsboro, OR, he pairs deep technical rigor with pragmatic project leadership across complex semiconductor supply chains.
13 years of coding experience
6 years of employment as a software developer
Diplom(FH)-Ing, Environmental Engineering, Diplom(FH)-Ing, Environmental Engineering at Fachhochschule Lübeck
Ph.D., Chemical Engineering, 3.80, Ph.D., Chemical Engineering, 3.80 at University of Florida
Associate Diploma, General Studies, Associate Diploma, General Studies at Shanghai Yan'an High School
Master's degree, Chemical Engineering, Master's degree, Chemical Engineering at Columbia University - Fu Foundation School of Engineering and Applied Science
Bachelor's degree, Chemical Engineering, Bachelor's degree, Chemical Engineering at East China University of Science and Technology
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Zhi Li - Process Integration TD Engineer Advanced Packaging