Summary
Ziyang Liu is a Staff Product Engineer with 11 years in the semiconductor industry, specializing in computational lithography and bringing deep expertise in Source Mask Optimization, OPC verification, and design-for-manufacturing. He combines a PhD in Materials Science with hands-on experience in lithography simulation, metrology, and process integration, having driven SMO efforts and imaging optimization at ASML. His background spans device physics, GaN-on-Si pilot line delivery, and advanced metrology application development, enabling him to bridge physics-driven modeling and practical factory constraints. Proficient in Python, Lua, SQL, optimization and ML techniques, he automates data analysis and tailors algorithms to improve yield and imaging fidelity. Notably, his academic work on III-V nanowire epitaxy produced a quantitative growth model and a novel metrology approach for defect assessment, reflecting a track record of turning research insight into production-ready solutions. Based in San Jose, he thrives on solving cross-disciplinary problems where semiconductor process, simulation, and data meet.
11 years of coding experience
12 years of employment as a software developer
Doctor of Philosophy (PhD) Materials Science, Doctor of Philosophy (PhD) Materials Science at KU Leuven
Master's degree Microelectronics and Solid-state Electronics, Master's degree Microelectronics and Solid-state Electronics at Xidian University