Summary
Ziyin Lin is a Packaging R&D Engineer and technologist with nine years of experience advancing semiconductor assembly processes and materials for Intel’s cutting-edge packaging architectures, including Foveros, EmIB/Co-EMIB, 2.5D/3D ICs and co-packaged optics. He combines deep materials chemistry and polymer formulation expertise from a PhD in Chemistry with hands-on process development—taking industry-first innovations from concept to high-volume manufacturing and delivering over $60M in cost savings. His work spans encapsulation, high-speed low-loss laminates for 224G, high-pin-count socket pathfinding, and reliability/failure analysis, underpinned by rigorous DOE, Six Sigma and DFM practices. Based in Chandler, AZ, he brings prior PCB/prepreg R&D experience and a knack for translating nanoscale surface chemistry and composite science into manufacturable, scalable packaging solutions.
9 years of coding experience
8 years of employment as a software developer
Doctor of Philosophy (PhD), Chemistry, Doctor of Philosophy (PhD), Chemistry at Georgia Institute of Technology
Bachelor's degree, Chemistry, Bachelor's degree, Chemistry at Peking University