Zonghao Li is an analog design staff engineer and PhD candidate in electrical and computer engineering at the University of Toronto, with eight years of experience building multi-Gbps NRZ and PAM4 SerDes IP. He combines academic research—applying machine learning to high-speed analog IC design and system-level SerDes modeling—with hands-on industry practice at Synopsys, bridging theory and production silicon. Trained at UBC and McGill, he brings a strong foundation in analog systems and a knack for leveraging data-driven methods to accelerate circuit design and modeling. Colleagues appreciate that he moves fluidly between deep technical research and pragmatic IP development, often finding novel ML-driven shortcuts that reduce iteration time on high-speed links.
8 years of coding experience
Bachelor of Applied Science - BASc (Distinction), Electrical and Electronics Engineering, Bachelor of Applied Science - BASc (Distinction), Electrical and Electronics Engineering at The University of British Columbia
Doctor of Philosophy - PhD, Electrical and Electronics Engineering, Doctor of Philosophy - PhD, Electrical and Electronics Engineering at University of Toronto
Master of Engineering - MEng (thesis-based), Electrical and Electronics Engineering, Master of Engineering - MEng (thesis-based), Electrical and Electronics Engineering at McGill University
Contributions:32 commits, 38 pushes, 1 branch in 5 months
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